AS/NZS 62386.103:2020
Digital addressable lighting interface, Part 103: General requirements - Control devices
Standard adopts and modifies IEC 62386 103:2014+AMD1:2018 CSV (ED. 1.1) for Australia and New Zealand, specifying control devices in a bus system for control by digital signals of electronic lighting equipment with the addition of DC supplies. Tests in this document are type tests. Requirements for testing individual products during production are not included.
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AS/NZS 62386.103:2020 Digital addressable lighting interface General requirements - Control devices (IEC 62386-103:2014+AMD1:2018 CSV (ED. 1.1) MOD)
CONTENTS
FOREWORD
INTRODUCTION
1 Scope
2 Normative references
3 Terms and definitions
4 General
4.1 General
4.2 Version number
5 Electrical specification
6 Interface power supply
7 Transmission protocol structure
7.1 General
7.2 24 bit forward frame encoding
7.2.1 Frame format for instructions and queries
7.2.2 Frame format for event messages
8 Timing
9 Method of operation
9.1 General
9.18 Device features
9.2 Application controller
9.2.1 General
9.2.2 Single-master application controller
9.2.3 Multi-master application controller
9.3 Input device
9.4 Instances of input devices
9.4.1 General
9.4.2 Instance number
9.4.3 Instance type
9.4.4 Instance features
9.4.5 Instance groups
9.5 Commands
9.5.1 General
9.5.2 Device commands
9.5.3 Instance commands
9.5.4 Feature commands
9.6 Event messages
9.6.1 Response to event messages
9.6.2 Device power cycle event
9.6.3 Input notification event
9.6.4 Event message filter
9.7 Input signal and input value
9.7.1 General
9.7.2 Input resolution
9.7.3 Getting the input value
9.7.4 Notification of changes
9.8 System failure
9.9 Operating a control device
9.9.1 Enable/disable the application controller
9.9.5 Application controller always active
9.9.2 Enable/disable event messages
9.9.3 Quiescent mode
9.9.4 Modes of operation
9.10 Memory banks
9.10.1 General
9.10.2 Memory map
9.10.3 Selecting a memory bank location
9.10.4 Memory bank reading
9.10.5 Memory bank writing
9.10.6 Memory bank 0
9.10.7 Memory bank 1
9.10.8 Manufacturer specific memory banks
9.10.9 Reserved memory banks
9.11 Reset
9.11.1 Reset operation
9.11.2 Reset memory bank operation
9.12 Power on behaviour
9.12.1 Power on
9.12.2 Power cycle notification
9.13 Priority use
9.13.1 General
9.13.2 Priority of input notifications
9.14 Assigning short addresses
9.14.1 General
9.14.2 Random address allocation
9.14.3 Identification of a device
9.15 Exception handling
9.16 Device capabilities and status information
9.16.1 Device capabilities
9.16.2 Device status
9.16.3 Instance status
9.17 Non-volatile memory
10 Declaration of variables
11 Definition of commands
11.1 General
11.2 Overview sheets
11.3 Event messages
11.3.1 INPUT NOTIFICATION (device/instance, event)
11.3.2 POWER NOTIFICATION (device)
11.4 Device control instructions
11.4.1 General
11.4.2 IDENTIFY DEVICE
11.4.3 RESET POWER CYCLE SEEN
11.5 Device configuration instructions
11.5.1 General
11.5.2 RESET
11.5.3 RESET MEMORY BANK (DTR0)
11.5.4 SET SHORT ADDRESS (DTR0)
11.5.5 ENABLE WRITE MEMORY
11.5.6 ENABLE APPLICATION CONTROLLER
11.5.7 DISABLE APPLICATION CONTROLLER
11.5.8 SET OPERATING MODE (DTR0)
11.5.9 ADD TO DEVICE GROUPS 0-15 (DTR2:DTR1)
11.5.10 ADD TO DEVICE GROUPS 16-31 ( DTR2:DTR1 )
11.5.11 REMOVE FROM DEVICE GROUPS 0-15 (DTR2:DTR1)
11.5.12 REMOVE FROM DEVICE GROUPS 16-31 (DTR2:DTR1)
11.5.13 START QUIESCENT MODE
11.5.14 STOP QUIESCENT MODE
11.5.15 ENABLE POWER CYCLE NOTIFICATION
11.5.16 DISABLE POWER CYCLE NOTIFICATION
11.5.17 SAVE PERSISTENT VARIABLES
11.6 Device queries
11.6.1 General
11.6.2 QUERY DEVICE CAPABILITIES
11.6.3 QUERY DEVICE STATUS
11.6.4 QUERY APPLICATION CONTROLLER ERROR
11.6.5 QUERY INPUT DEVICE ERROR
11.6.6 QUERY MISSING SHORT ADDRESS
11.6.7 QUERY VERSION NUMBER
11.6.8 QUERY CONTENT DTR0
11.6.9 QUERY NUMBER OF INSTANCES
11.6.10 QUERY CONTENT DTR1
11.6.11 QUERY CONTENT DTR2
11.6.12 QUERY RANDOM ADDRESS (H)
11.6.13 QUERY RANDOM ADDRESS (M)
11.6.14 QUERY RANDOM ADDRESS (L)
11.6.15 READ MEMORY LOCATION (DTR1, DTR0)
11.6.16 QUERY APPLICATION CONTROLLER ENABLED
11.6.17 QUERY OPERATING MODE
11.6.18 QUERY MANUFACTURER SPECIFIC MODE
11.6.19 QUERY QUIESCENT MODE
11.6.20 QUERY DEVICE GROUPS 0-7
11.6.21 QUERY DEVICE GROUPS 8-15
11.6.22 QUERY DEVICE GROUPS 16-23
11.6.23 QUERY DEVICE GROUPS 24-31
11.6.24 QUERY POWER CYCLE NOTIFICATION
11.6.25 QUERY EXTENDED VERSION NUMBER(DTR0)
11.6.26 QUERY RESET STATE
11.6.27 QUERY APPLICATION CONTROLLER ALWAYS ACTIVE
11.6.28 QUERY FEATURE TYPE
11.6.29 QUERY NEXT FEATURE TYPE
11.7 Instance control instructions
11.8 Instance configuration instructions
11.8.1 General
11.8.2 ENABLE INSTANCE
11.8.3 DISABLE INSTANCE
11.8.4 SET PRIMARY INSTANCE GROUP (DTR0)
11.8.5 SET INSTANCE GROUP 1 (DTR0)
11.8.6 SET INSTANCE GROUP 2 (DTR0)
11.8.7 SET EVENT SCHEME (DTR0)
11.8.8 SET EVENT PRIORITY (DTR0)
11.8.9 SET EVENT FILTER (DTR2, DTR1, DTR0)
11.9 Instance queries
11.9.1 General
11.9.2 QUERY INSTANCE TYPE
11.9.3 QUERY RESOLUTION
11.9.4 QUERY INSTANCE ERROR
11.9.5 QUERY INSTANCE STATUS
11.9.6 QUERY INSTANCE ENABLED
11.9.7 QUERY PRIMARY INSTANCE GROUP
11.9.8 QUERY INSTANCE GROUP 1
11.9.9 QUERY INSTANCE GROUP 2
11.9.10 QUERY EVENT SCHEME
11.9.11 QUERY INPUT VALUE
11.9.12 QUERY INPUT VALUE LATCH
11.9.13 QUERY EVENT PRIORITY
11.9.14 QUERY FEATURE TYPE
11.9.15 QUERY NEXT FEATURE TYPE
11.9.16 QUERY EVENT FILTER 0-7
11.9.17 QUERY EVENT FILTER 8-15
11.9.18 QUERY EVENT FILTER 16-23
11.10 Special commands
11.10.1 General
11.10.2 TERMINATE
11.10.3 INITIALISE (device)
11.10.4 RANDOMISE
11.10.5 COMPARE
11.10.6 WITHDRAW
11.10.7 SEARCHADDRH (data)
11.10.8 SEARCHADDRM (data)
11.10.9 SEARCHADDRL (data)
11.10.10 PROGRAM SHORT ADDRESS (data)
11.10.11 VERIFY SHORT ADDRESS (data)
11.10.12 QUERY SHORT ADDRESS
11.10.13 WRITE MEMORY LOCATION (DTR1, DTR0, data)
11.10.14 WRITE MEMORY LOCATION NO REPLY (DTR1, DTR0, data)
11.10.15 DTR0 (data)
11.10.16 DTR1 (data)
11.10.17 DTR2 (data)
11.10.18 DIRECT WRITE MEMORY (DTR1, offset, data)
11.10.19 DTR1:DTR0 (data1, data0)
11.10.20 DTR2:DTR1 (data2, data1)
11.10.21 SEND TESTFRAME (data)
12 Test procedures
12.1 General notes on test
12.1.1 General
12.1.2 Test execution
12.1.3 Data transmission
12.1.4 Test setup
12.1.5 Test output
12.1.6 Test notation
12.1.7 Test execution limitations
12.1.8 Test results
12.1.9 Exception handling
12.1.10 Unexpected answer
12.2 Preamble
12.2.1 Test preamble
12.3 Physical operational parameters
12.3.1 Polarity test
12.3.2 Maximum and minimum system voltage
12.3.3 Overvoltage protection test
12.3.4 Current rating test
12.3.5 Transmitter voltages
12.3.6 Transmitter rising and falling edges
12.3.7 Transmitter bit timing
12.3.8 Transmitter frame timing
12.3.9 Receiver start-up behavior
12.3.10 Receiver threshold
12.3.11 Receiver bit timing
12.3.12 Extended receiver bit timing
12.3.13 Receiver forward frame violation
12.3.14 Receiver settling timing
12.3.15 Receiver frame timing FF-FF send twice
12.3.16 Transmitter collision avoidance by priority
12.3.17 Transmitter collision detection for truncated idle phase
12.3.18 Transmitter collision detection for extended active phase
12.4 Device configuration instructions
12.4.1 RESET deviceGroups
12.4.2 RESET quiescentMode
12.4.3 RESET instance groups
12.4.4 RESET event filter
12.4.5 RESET event scheme
12.4.6 RESET: timeout / command in-between
12.4.7 Send twice timeout (device)
12.4.8 Send twice timeout (instance)
12.4.9 Commands in-between (device)
12.4.10 Commands in-between (instance)
12.4.11 SAVE PERSISTENT VARIABLES
12.4.12 SET OPERATING MODE
12.4.13 Device Disable/Enable Application Controller
12.4.14 Multi Master Control Device PING
12.4.15 Quiescent Mode
12.4.16 Device power cycle notification
12.4.17 SET SHORT ADDRESS
12.4.18 Reset/Power-on values (device)
12.4.19 Reset/Power-on values (instance)
12.4.20 DTR0 / DTR1 / DTR2
12.4.21 DTR1:DTR0 and DTR2:DTR1
12.4.22 Device Groups
12.5 Device queries
12.5.1 Device query capabilities
12.5.2 QUERY VERSION NUMBER
12.5.3 Device power cycle seen
12.5.4 Input device error
12.6 Device Memory banks
12.6.1 READ MEMORY LOCATION on Memory Bank 0
12.6.2 READ MEMORY LOCATION on Memory Bank 1
12.6.3 READ MEMORY LOCATION on other Memory Banks
12.6.4 Memory bank writing
12.6.5 ENABLE WRITE MEMORY: writeEnableState
12.6.6 ENABLE WRITE MEMORY: timeout / command in-between
12.6.7 RESET MEMORY BANK: timeout / command in-between
12.6.8 RESET MEMORY BANK
12.7 Device Special commands
12.7.1 INITIALISE timer
12.7.2 TERMINATE
12.7.3 INITIALISE - device addressing
12.7.4 RANDOMISE
12.7.5 COMPARE
12.7.6 WITHDRAW
12.7.7 SEARCHADDRH / SEARCHADDRM / SEARCHADDRL
12.7.8 PROGRAM SHORT ADDRESS
12.7.9 VERIFY SHORT ADDRESS
12.7.10 QUERY SHORT ADDRESS
12.7.11 IDENTIFY DEVICE
12.8 Logical unit cross contamination
12.8.1 DTR0
12.8.2 NVM variables
12.8.3 Random address generation
12.8.4 Addressing 1
12.8.5 Addressing 2
12.8.6 Addressing 3
12.9 Instance addressing
12.9.1 Instance Type Addressing
12.9.2 Instance Primary Group
12.9.3 Instance Group 2
12.9.4 Instance Group 1
12.9.5 Instance Group Combinations
12.9.6 Multiple Instances Answer
12.10 Instance configuration instructions
12.10.1 Instance Enable/Disable
12.10.2 Event Scheme
12.10.3 Input Resolution & Input Value
12.10.4 Event Filter
12.11 Instance queries
12.11.1 Instance Number and Types
12.11.2 Instance Status
12.11.3 Instance Error
12.12 Instance cross contamination
12.12.1 Instance Event Priority
12.13 Reserved Commands
12.13.1 Reserved standard device commands
12.13.2 Reserved instance commands (instance type 0)
12.13.3 Reserved special commands
12.14 General subsequences
12.14.1 Reset Device
12.14.2 EnableApplicationControllerAndAllInstances
12.14.3 DisableApplicationControllerAndAllInstances
12.14.4 HasApplicationController
12.14.5 GetVersionNumber
12.14.6 AddDeviceGroups
12.14.7 RemoveDeviceGroups
12.14.8 ClearAllDeviceGroups
12.14.9 CheckDeviceGroups
12.14.10 GetDeviceGroups
12.14.11 PowerCycle
12.14.12 PowerCycleAndWaitForBusPower
12.14.13 PowerCycleAndWaitForDecoder
12.14.14 SetupTestFrame
12.14.15 GetNumberOfInstances
12.14.16 GetEventFilter
12.14.17 SetEventFilter
12.14.18 GetNumberOfLogicalUnits
12.14.19 GetIndexOfLogicalUnit
12.14.20 GetRandomAddress
12.14.21 GetLimitedRandomAddress
12.14.22 SetSearchAddress
12.14.23 SetShortAddress
12.14.24 ReadMemBankMultibyteLocation
12.14.25 FindImplementedMemoryBank
12.14.26 FindAllImplementedMemoryBanks
12.14.27 ShortAddress
12.14.28 GroupAddress
12.14.29 Broadcast
12.14.30 BroadcastUnaddressed
12.14.31 InstanceNumber
12.14.32 InstanceGroup
12.14.33 InstanceType
12.14.34 InstanceBroadcast
12.14.35 FeatureOfInstanceNumber
12.14.36 FeatureOfInstanceGroup
12.14.37 FeatureOfInstanceType
12.14.38 FeatureOfInstanceBroadcast
12.14.39 FeatureOfDevice
12.14.40 FeatureOfDeviceWithGroupAddress
12.14.41 FeatureOfDeviceWithBroadcast
Bibliography
Figures
Figure 1 - IEC 62386 graphical overview
Figure 2 Current rating test
Tables
Table 1 24bit command frame encoding
Table 2 Instance byte in a command frame
Table 3 24bit event message frame encoding
Table 4 Instance types
Table 5 Feature types
Table 6 Instance group variables
Table 7 Device address information in power cycle event
Table 8 Event addressing schemes
Table 9 Signal level (~50%) versus resolution and input value
Table 10 Example querying sequence to read a 4byte input value
Table 11 Basic memory map of memory banks
Table 12 Memory map of memory bank 0
Table 13 Memory map of memory bank 1
Table 14 Control device capabilities
Table 15 Control device status
Table 16 Instance status
Table 17 Declaration of device variables
Table 18 Declaration of instance variables
Table 19 Instance event messages
Table 20 Device event messages
Table 21 Standard commands
Table 22 Special commands (implemented by both application controller and input device)
Table 23 Device addressing with INITIALISE (device)
Table 24 Unexpected outcome
Table 25 Parameters for test sequence Check Factory Default 103
Table 26 Parameters for test sequence CheckFactoryDefault103PerLogicalUnit
Table 27 Parameters for test sequence Transmitter bit timing
Table 28 Parameters for test sequence Maximum and minimum system voltage
Table 29 Parameters for test sequence Transmitter voltages
Table 30 Parameters for test sequence Transmitter rising and falling edges
Table 31 Parameters for test sequence Transmitter bit timing
Table 32 Parameters for test sequence Receiver frame timing
Table 33 Parameters for test sequence Receiver start-up behavior
Table 34 Parameters for test sequence Receiver bit timing
Table 35 Parameters for test sequence extended receiver bit timing
Table 36 Parameters for test sequence Receiver frame violationand recovering after frame size violation
Table 37 Parameters for test sequence Receiver frame timing
Table 38 Parameters for test sequence transmitter collision avoidance by priority
Table 39 Parameters for test sequence transmittercollision detection for truncated idle phase
Table 40 Parameters for test sequence transmittercollision detection for extended active phase
Table 41 Parameters for test sequence RESET instance groups
Table 42 Parameters for test sequence Send twice timeout (device)
Table 43 Parameters for test sequence Send twice timeout (instance)
Table 44 Parameters for test sequence Commands in-between (device)
Table 45 Parameters for test sequence Commands in-between
Table 46 Parameters for test sequence SET SHORT ADDRESS
Table 47 Parameters for test sequence Reset/Power-on values (device)
Table 48 Parameters for test sequence Reset/Power-on values (instance)
Table 49 Parameters for test sequence DTR0 / DTR1 / DTR2
Table 50 Parameters for test sequence DTR1:DTR0 and DTR2:DTR1
Table 51 Parameters for test sequence READ MEMORY LOCATION on Memory Bank 0
Table 52 Parameters for test sequence READ MEMORY LOCATION on Memory Bank 1
Table 53 Parameters for test sequence Memory bank writing
Table 54 Parameters for test sequence ENABLE WRITE MEMORY: writeEnableState
Table 55 Parameters for test sequence ENABLE WRITE MEMORY: timeout / command in-between
Table 56 Parameters for test sequence RESET MEMORY BANK:timeout / command in-between
Table 57 Parameters for test sequence RESET MEMORY BANK
Table 58 Parameters for test sequence INITIALISE - device addressing
Table 59 Parameters for test sequence COMPARE
Table 60 Parameters for test sequence WITHDRAW
Table 61 Parameters for test sequence PROGRAM SHORT ADDRESS
Table 62 Parameters for test sequence VERIFY SHORT ADDRESS
Table 63 Parameters for test sequence QUERY SHORT ADDRESS
Table 64 Parameters for test sequence IDENTIFY DEVICE
Table 65 Parameters for test sequence Addressing 2
Table 66 Parameters for test sequence Reserved commands:standard device commands
Table 67 Parameters for test sequence Reserved instance commands (instance type 0)
Table 68 Parameters for test sequence Reserved special commands
AS_NZS_62386.103_2020_WEB cover.pdf
AS/NZS 62386.103:2020 Digital addressable lighting interface General requirements - Control devices (IEC 62386-103:2014+AMD1:2018 CSV (ED. 1.1) MOD)
CONTENTS
FOREWORD
INTRODUCTION
1 Scope
2 Normative references
3 Terms and definitions
4 General
4.1 General
4.2 Version number
5 Electrical specification
6 Interface power supply
7 Transmission protocol structure
7.1 General
7.2 24 bit forward frame encoding
7.2.1 Frame format for instructions and queries
7.2.2 Frame format for event messages
8 Timing
9 Method of operation
9.1 General
9.18 Device features
9.2 Application controller
9.2.1 General
9.2.2 Single-master application controller
9.2.3 Multi-master application controller
9.3 Input device
9.4 Instances of input devices
9.4.1 General
9.4.2 Instance number
9.4.3 Instance type
9.4.4 Instance features
9.4.5 Instance groups
9.5 Commands
9.5.1 General
9.5.2 Device commands
9.5.3 Instance commands
9.5.4 Feature commands
9.6 Event messages
9.6.1 Response to event messages
9.6.2 Device power cycle event
9.6.3 Input notification event
9.6.4 Event message filter
9.7 Input signal and input value
9.7.1 General
9.7.2 Input resolution
9.7.3 Getting the input value
9.7.4 Notification of changes
9.8 System failure
9.9 Operating a control device
9.9.1 Enable/disable the application controller
9.9.5 Application controller always active
9.9.2 Enable/disable event messages
9.9.3 Quiescent mode
9.9.4 Modes of operation
9.10 Memory banks
9.10.1 General
9.10.2 Memory map
9.10.3 Selecting a memory bank location
9.10.4 Memory bank reading
9.10.5 Memory bank writing
9.10.6 Memory bank 0
9.10.7 Memory bank 1
9.10.8 Manufacturer specific memory banks
9.10.9 Reserved memory banks
9.11 Reset
9.11.1 Reset operation
9.11.2 Reset memory bank operation
9.12 Power on behaviour
9.12.1 Power on
9.12.2 Power cycle notification
9.13 Priority use
9.13.1 General
9.13.2 Priority of input notifications
9.14 Assigning short addresses
9.14.1 General
9.14.2 Random address allocation
9.14.3 Identification of a device
9.15 Exception handling
9.16 Device capabilities and status information
9.16.1 Device capabilities
9.16.2 Device status
9.16.3 Instance status
9.17 Non-volatile memory
10 Declaration of variables
11 Definition of commands
11.1 General
11.2 Overview sheets
11.3 Event messages
11.3.1 INPUT NOTIFICATION (device/instance, event)
11.3.2 POWER NOTIFICATION (device)
11.4 Device control instructions
11.4.1 General
11.4.2 IDENTIFY DEVICE
11.4.3 RESET POWER CYCLE SEEN
11.5 Device configuration instructions
11.5.1 General
11.5.2 RESET
11.5.3 RESET MEMORY BANK (DTR0)
11.5.4 SET SHORT ADDRESS (DTR0)
11.5.5 ENABLE WRITE MEMORY
11.5.6 ENABLE APPLICATION CONTROLLER
11.5.7 DISABLE APPLICATION CONTROLLER
11.5.8 SET OPERATING MODE (DTR0)
11.5.9 ADD TO DEVICE GROUPS 0-15 (DTR2:DTR1)
11.5.10 ADD TO DEVICE GROUPS 16-31 ( DTR2:DTR1 )
11.5.11 REMOVE FROM DEVICE GROUPS 0-15 (DTR2:DTR1)
11.5.12 REMOVE FROM DEVICE GROUPS 16-31 (DTR2:DTR1)
11.5.13 START QUIESCENT MODE
11.5.14 STOP QUIESCENT MODE
11.5.15 ENABLE POWER CYCLE NOTIFICATION
11.5.16 DISABLE POWER CYCLE NOTIFICATION
11.5.17 SAVE PERSISTENT VARIABLES
11.6 Device queries
11.6.1 General
11.6.2 QUERY DEVICE CAPABILITIES
11.6.3 QUERY DEVICE STATUS
11.6.4 QUERY APPLICATION CONTROLLER ERROR
11.6.5 QUERY INPUT DEVICE ERROR
11.6.6 QUERY MISSING SHORT ADDRESS
11.6.7 QUERY VERSION NUMBER
11.6.8 QUERY CONTENT DTR0
11.6.9 QUERY NUMBER OF INSTANCES
11.6.10 QUERY CONTENT DTR1
11.6.11 QUERY CONTENT DTR2
11.6.12 QUERY RANDOM ADDRESS (H)
11.6.13 QUERY RANDOM ADDRESS (M)
11.6.14 QUERY RANDOM ADDRESS (L)
11.6.15 READ MEMORY LOCATION (DTR1, DTR0)
11.6.16 QUERY APPLICATION CONTROLLER ENABLED
11.6.17 QUERY OPERATING MODE
11.6.18 QUERY MANUFACTURER SPECIFIC MODE
11.6.19 QUERY QUIESCENT MODE
11.6.20 QUERY DEVICE GROUPS 0-7
11.6.21 QUERY DEVICE GROUPS 8-15
11.6.22 QUERY DEVICE GROUPS 16-23
11.6.23 QUERY DEVICE GROUPS 24-31
11.6.24 QUERY POWER CYCLE NOTIFICATION
11.6.25 QUERY EXTENDED VERSION NUMBER(DTR0)
11.6.26 QUERY RESET STATE
11.6.27 QUERY APPLICATION CONTROLLER ALWAYS ACTIVE
11.6.28 QUERY FEATURE TYPE
11.6.29 QUERY NEXT FEATURE TYPE
11.7 Instance control instructions
11.8 Instance configuration instructions
11.8.1 General
11.8.2 ENABLE INSTANCE
11.8.3 DISABLE INSTANCE
11.8.4 SET PRIMARY INSTANCE GROUP (DTR0)
11.8.5 SET INSTANCE GROUP 1 (DTR0)
11.8.6 SET INSTANCE GROUP 2 (DTR0)
11.8.7 SET EVENT SCHEME (DTR0)
11.8.8 SET EVENT PRIORITY (DTR0)
11.8.9 SET EVENT FILTER (DTR2, DTR1, DTR0)
11.9 Instance queries
11.9.1 General
11.9.2 QUERY INSTANCE TYPE
11.9.3 QUERY RESOLUTION
11.9.4 QUERY INSTANCE ERROR
11.9.5 QUERY INSTANCE STATUS
11.9.6 QUERY INSTANCE ENABLED
11.9.7 QUERY PRIMARY INSTANCE GROUP
11.9.8 QUERY INSTANCE GROUP 1
11.9.9 QUERY INSTANCE GROUP 2
11.9.10 QUERY EVENT SCHEME
11.9.11 QUERY INPUT VALUE
11.9.12 QUERY INPUT VALUE LATCH
11.9.13 QUERY EVENT PRIORITY
11.9.14 QUERY FEATURE TYPE
11.9.15 QUERY NEXT FEATURE TYPE
11.9.16 QUERY EVENT FILTER 0-7
11.9.17 QUERY EVENT FILTER 8-15
11.9.18 QUERY EVENT FILTER 16-23
11.10 Special commands
11.10.1 General
11.10.2 TERMINATE
11.10.3 INITIALISE (device)
11.10.4 RANDOMISE
11.10.5 COMPARE
11.10.6 WITHDRAW
11.10.7 SEARCHADDRH (data)
11.10.8 SEARCHADDRM (data)
11.10.9 SEARCHADDRL (data)
11.10.10 PROGRAM SHORT ADDRESS (data)
11.10.11 VERIFY SHORT ADDRESS (data)
11.10.12 QUERY SHORT ADDRESS
11.10.13 WRITE MEMORY LOCATION (DTR1, DTR0, data)
11.10.14 WRITE MEMORY LOCATION NO REPLY (DTR1, DTR0, data)
11.10.15 DTR0 (data)
11.10.16 DTR1 (data)
11.10.17 DTR2 (data)
11.10.18 DIRECT WRITE MEMORY (DTR1, offset, data)
11.10.19 DTR1:DTR0 (data1, data0)
11.10.20 DTR2:DTR1 (data2, data1)
11.10.21 SEND TESTFRAME (data)
12 Test procedures
12.1 General notes on test
12.1.1 General
12.1.2 Test execution
12.1.3 Data transmission
12.1.4 Test setup
12.1.5 Test output
12.1.6 Test notation
12.1.7 Test execution limitations
12.1.8 Test results
12.1.9 Exception handling
12.1.10 Unexpected answer
12.2 Preamble
12.2.1 Test preamble
12.3 Physical operational parameters
12.3.1 Polarity test
12.3.2 Maximum and minimum system voltage
12.3.3 Overvoltage protection test
12.3.4 Current rating test
12.3.5 Transmitter voltages
12.3.6 Transmitter rising and falling edges
12.3.7 Transmitter bit timing
12.3.8 Transmitter frame timing
12.3.9 Receiver start-up behavior
12.3.10 Receiver threshold
12.3.11 Receiver bit timing
12.3.12 Extended receiver bit timing
12.3.13 Receiver forward frame violation
12.3.14 Receiver settling timing
12.3.15 Receiver frame timing FF-FF send twice
12.3.16 Transmitter collision avoidance by priority
12.3.17 Transmitter collision detection for truncated idle phase
12.3.18 Transmitter collision detection for extended active phase
12.4 Device configuration instructions
12.4.1 RESET deviceGroups
12.4.2 RESET quiescentMode
12.4.3 RESET instance groups
12.4.4 RESET event filter
12.4.5 RESET event scheme
12.4.6 RESET: timeout / command in-between
12.4.7 Send twice timeout (device)
12.4.8 Send twice timeout (instance)
12.4.9 Commands in-between (device)
12.4.10 Commands in-between (instance)
12.4.11 SAVE PERSISTENT VARIABLES
12.4.12 SET OPERATING MODE
12.4.13 Device Disable/Enable Application Controller
12.4.14 Multi Master Control Device PING
12.4.15 Quiescent Mode
12.4.16 Device power cycle notification
12.4.17 SET SHORT ADDRESS
12.4.18 Reset/Power-on values (device)
12.4.19 Reset/Power-on values (instance)
12.4.20 DTR0 / DTR1 / DTR2
12.4.21 DTR1:DTR0 and DTR2:DTR1
12.4.22 Device Groups
12.5 Device queries
12.5.1 Device query capabilities
12.5.2 QUERY VERSION NUMBER
12.5.3 Device power cycle seen
12.5.4 Input device error
12.6 Device Memory banks
12.6.1 READ MEMORY LOCATION on Memory Bank 0
12.6.2 READ MEMORY LOCATION on Memory Bank 1
12.6.3 READ MEMORY LOCATION on other Memory Banks
12.6.4 Memory bank writing
12.6.5 ENABLE WRITE MEMORY: writeEnableState
12.6.6 ENABLE WRITE MEMORY: timeout / command in-between
12.6.7 RESET MEMORY BANK: timeout / command in-between
12.6.8 RESET MEMORY BANK
12.7 Device Special commands
12.7.1 INITIALISE timer
12.7.2 TERMINATE
12.7.3 INITIALISE - device addressing
12.7.4 RANDOMISE
12.7.5 COMPARE
12.7.6 WITHDRAW
12.7.7 SEARCHADDRH / SEARCHADDRM / SEARCHADDRL
12.7.8 PROGRAM SHORT ADDRESS
12.7.9 VERIFY SHORT ADDRESS
12.7.10 QUERY SHORT ADDRESS
12.7.11 IDENTIFY DEVICE
12.8 Logical unit cross contamination
12.8.1 DTR0
12.8.2 NVM variables
12.8.3 Random address generation
12.8.4 Addressing 1
12.8.5 Addressing 2
12.8.6 Addressing 3
12.9 Instance addressing
12.9.1 Instance Type Addressing
12.9.2 Instance Primary Group
12.9.3 Instance Group 2
12.9.4 Instance Group 1
12.9.5 Instance Group Combinations
12.9.6 Multiple Instances Answer
12.10 Instance configuration instructions
12.10.1 Instance Enable/Disable
12.10.2 Event Scheme
12.10.3 Input Resolution & Input Value
12.10.4 Event Filter
12.11 Instance queries
12.11.1 Instance Number and Types
12.11.2 Instance Status
12.11.3 Instance Error
12.12 Instance cross contamination
12.12.1 Instance Event Priority
12.13 Reserved Commands
12.13.1 Reserved standard device commands
12.13.2 Reserved instance commands (instance type 0)
12.13.3 Reserved special commands
12.14 General subsequences
12.14.1 Reset Device
12.14.2 EnableApplicationControllerAndAllInstances
12.14.3 DisableApplicationControllerAndAllInstances
12.14.4 HasApplicationController
12.14.5 GetVersionNumber
12.14.6 AddDeviceGroups
12.14.7 RemoveDeviceGroups
12.14.8 ClearAllDeviceGroups
12.14.9 CheckDeviceGroups
12.14.10 GetDeviceGroups
12.14.11 PowerCycle
12.14.12 PowerCycleAndWaitForBusPower
12.14.13 PowerCycleAndWaitForDecoder
12.14.14 SetupTestFrame
12.14.15 GetNumberOfInstances
12.14.16 GetEventFilter
12.14.17 SetEventFilter
12.14.18 GetNumberOfLogicalUnits
12.14.19 GetIndexOfLogicalUnit
12.14.20 GetRandomAddress
12.14.21 GetLimitedRandomAddress
12.14.22 SetSearchAddress
12.14.23 SetShortAddress
12.14.24 ReadMemBankMultibyteLocation
12.14.25 FindImplementedMemoryBank
12.14.26 FindAllImplementedMemoryBanks
12.14.27 ShortAddress
12.14.28 GroupAddress
12.14.29 Broadcast
12.14.30 BroadcastUnaddressed
12.14.31 InstanceNumber
12.14.32 InstanceGroup
12.14.33 InstanceType
12.14.34 InstanceBroadcast
12.14.35 FeatureOfInstanceNumber
12.14.36 FeatureOfInstanceGroup
12.14.37 FeatureOfInstanceType
12.14.38 FeatureOfInstanceBroadcast
12.14.39 FeatureOfDevice
12.14.40 FeatureOfDeviceWithGroupAddress
12.14.41 FeatureOfDeviceWithBroadcast
Bibliography
Figures
Figure 1 - IEC 62386 graphical overview
Figure 2 Current rating test
Tables
Table 1 24bit command frame encoding
Table 2 Instance byte in a command frame
Table 3 24bit event message frame encoding
Table 4 Instance types
Table 5 Feature types
Table 6 Instance group variables
Table 7 Device address information in power cycle event
Table 8 Event addressing schemes
Table 9 Signal level (~50%) versus resolution and input value
Table 10 Example querying sequence to read a 4byte input value
Table 11 Basic memory map of memory banks
Table 12 Memory map of memory bank 0
Table 13 Memory map of memory bank 1
Table 14 Control device capabilities
Table 15 Control device status
Table 16 Instance status
Table 17 Declaration of device variables
Table 18 Declaration of instance variables
Table 19 Instance event messages
Table 20 Device event messages
Table 21 Standard commands
Table 22 Special commands (implemented by both application controller and input device)
Table 23 Device addressing with INITIALISE (device)
Table 24 Unexpected outcome
Table 25 Parameters for test sequence Check Factory Default 103
Table 26 Parameters for test sequence CheckFactoryDefault103PerLogicalUnit
Table 27 Parameters for test sequence Transmitter bit timing
Table 28 Parameters for test sequence Maximum and minimum system voltage
Table 29 Parameters for test sequence Transmitter voltages
Table 30 Parameters for test sequence Transmitter rising and falling edges
Table 31 Parameters for test sequence Transmitter bit timing
Table 32 Parameters for test sequence Receiver frame timing
Table 33 Parameters for test sequence Receiver start-up behavior
Table 34 Parameters for test sequence Receiver bit timing
Table 35 Parameters for test sequence extended receiver bit timing
Table 36 Parameters for test sequence Receiver frame violationand recovering after frame size violation
Table 37 Parameters for test sequence Receiver frame timing
Table 38 Parameters for test sequence transmitter collision avoidance by priority
Table 39 Parameters for test sequence transmittercollision detection for truncated idle phase
Table 40 Parameters for test sequence transmittercollision detection for extended active phase
Table 41 Parameters for test sequence RESET instance groups
Table 42 Parameters for test sequence Send twice timeout (device)
Table 43 Parameters for test sequence Send twice timeout (instance)
Table 44 Parameters for test sequence Commands in-between (device)
Table 45 Parameters for test sequence Commands in-between
Table 46 Parameters for test sequence SET SHORT ADDRESS
Table 47 Parameters for test sequence Reset/Power-on values (device)
Table 48 Parameters for test sequence Reset/Power-on values (instance)
Table 49 Parameters for test sequence DTR0 / DTR1 / DTR2
Table 50 Parameters for test sequence DTR1:DTR0 and DTR2:DTR1
Table 51 Parameters for test sequence READ MEMORY LOCATION on Memory Bank 0
Table 52 Parameters for test sequence READ MEMORY LOCATION on Memory Bank 1
Table 53 Parameters for test sequence Memory bank writing
Table 54 Parameters for test sequence ENABLE WRITE MEMORY: writeEnableState
Table 55 Parameters for test sequence ENABLE WRITE MEMORY: timeout / command in-between
Table 56 Parameters for test sequence RESET MEMORY BANK:timeout / command in-between
Table 57 Parameters for test sequence RESET MEMORY BANK
Table 58 Parameters for test sequence INITIALISE - device addressing
Table 59 Parameters for test sequence COMPARE
Table 60 Parameters for test sequence WITHDRAW
Table 61 Parameters for test sequence PROGRAM SHORT ADDRESS
Table 62 Parameters for test sequence VERIFY SHORT ADDRESS
Table 63 Parameters for test sequence QUERY SHORT ADDRESS
Table 64 Parameters for test sequence IDENTIFY DEVICE
Table 65 Parameters for test sequence Addressing 2
Table 66 Parameters for test sequence Reserved commands:standard device commands
Table 67 Parameters for test sequence Reserved instance commands (instance type 0)
Table 68 Parameters for test sequence Reserved special commands
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AS/NZS 62386.103:2020 Digital addressable lighting interface General requirements - Control devices (IEC 62386-103:2014+AMD1:2018 CSV (ED. 1.1) MOD)
CONTENTS
FOREWORD
INTRODUCTION
1 Scope
2 Normative references
3 Terms and definitions
4 General
4.1 General
4.2 Version number
5 Electrical specification
6 Interface power supply
7 Transmission protocol structure
7.1 General
7.2 24 bit forward frame encoding
7.2.1 Frame format for instructions and queries
7.2.2 Frame format for event messages
8 Timing
9 Method of operation
9.1 General
9.18 Device features
9.2 Application controller
9.2.1 General
9.2.2 Single-master application controller
9.2.3 Multi-master application controller
9.3 Input device
9.4 Instances of input devices
9.4.1 General
9.4.2 Instance number
9.4.3 Instance type
9.4.4 Instance features
9.4.5 Instance groups
9.5 Commands
9.5.1 General
9.5.2 Device commands
9.5.3 Instance commands
9.5.4 Feature commands
9.6 Event messages
9.6.1 Response to event messages
9.6.2 Device power cycle event
9.6.3 Input notification event
9.6.4 Event message filter
9.7 Input signal and input value
9.7.1 General
9.7.2 Input resolution
9.7.3 Getting the input value
9.7.4 Notification of changes
9.8 System failure
9.9 Operating a control device
9.9.1 Enable/disable the application controller
9.9.5 Application controller always active
9.9.2 Enable/disable event messages
9.9.3 Quiescent mode
9.9.4 Modes of operation
9.10 Memory banks
9.10.1 General
9.10.2 Memory map
9.10.3 Selecting a memory bank location
9.10.4 Memory bank reading
9.10.5 Memory bank writing
9.10.6 Memory bank 0
9.10.7 Memory bank 1
9.10.8 Manufacturer specific memory banks
9.10.9 Reserved memory banks
9.11 Reset
9.11.1 Reset operation
9.11.2 Reset memory bank operation
9.12 Power on behaviour
9.12.1 Power on
9.12.2 Power cycle notification
9.13 Priority use
9.13.1 General
9.13.2 Priority of input notifications
9.14 Assigning short addresses
9.14.1 General
9.14.2 Random address allocation
9.14.3 Identification of a device
9.15 Exception handling
9.16 Device capabilities and status information
9.16.1 Device capabilities
9.16.2 Device status
9.16.3 Instance status
9.17 Non-volatile memory
10 Declaration of variables
11 Definition of commands
11.1 General
11.2 Overview sheets
11.3 Event messages
11.3.1 INPUT NOTIFICATION (device/instance, event)
11.3.2 POWER NOTIFICATION (device)
11.4 Device control instructions
11.4.1 General
11.4.2 IDENTIFY DEVICE
11.4.3 RESET POWER CYCLE SEEN
11.5 Device configuration instructions
11.5.1 General
11.5.2 RESET
11.5.3 RESET MEMORY BANK (DTR0)
11.5.4 SET SHORT ADDRESS (DTR0)
11.5.5 ENABLE WRITE MEMORY
11.5.6 ENABLE APPLICATION CONTROLLER
11.5.7 DISABLE APPLICATION CONTROLLER
11.5.8 SET OPERATING MODE (DTR0)
11.5.9 ADD TO DEVICE GROUPS 0-15 (DTR2:DTR1)
11.5.10 ADD TO DEVICE GROUPS 16-31 ( DTR2:DTR1 )
11.5.11 REMOVE FROM DEVICE GROUPS 0-15 (DTR2:DTR1)
11.5.12 REMOVE FROM DEVICE GROUPS 16-31 (DTR2:DTR1)
11.5.13 START QUIESCENT MODE
11.5.14 STOP QUIESCENT MODE
11.5.15 ENABLE POWER CYCLE NOTIFICATION
11.5.16 DISABLE POWER CYCLE NOTIFICATION
11.5.17 SAVE PERSISTENT VARIABLES
11.6 Device queries
11.6.1 General
11.6.2 QUERY DEVICE CAPABILITIES
11.6.3 QUERY DEVICE STATUS
11.6.4 QUERY APPLICATION CONTROLLER ERROR
11.6.5 QUERY INPUT DEVICE ERROR
11.6.6 QUERY MISSING SHORT ADDRESS
11.6.7 QUERY VERSION NUMBER
11.6.8 QUERY CONTENT DTR0
11.6.9 QUERY NUMBER OF INSTANCES
11.6.10 QUERY CONTENT DTR1
11.6.11 QUERY CONTENT DTR2
11.6.12 QUERY RANDOM ADDRESS (H)
11.6.13 QUERY RANDOM ADDRESS (M)
11.6.14 QUERY RANDOM ADDRESS (L)
11.6.15 READ MEMORY LOCATION (DTR1, DTR0)
11.6.16 QUERY APPLICATION CONTROLLER ENABLED
11.6.17 QUERY OPERATING MODE
11.6.18 QUERY MANUFACTURER SPECIFIC MODE
11.6.19 QUERY QUIESCENT MODE
11.6.20 QUERY DEVICE GROUPS 0-7
11.6.21 QUERY DEVICE GROUPS 8-15
11.6.22 QUERY DEVICE GROUPS 16-23
11.6.23 QUERY DEVICE GROUPS 24-31
11.6.24 QUERY POWER CYCLE NOTIFICATION
11.6.25 QUERY EXTENDED VERSION NUMBER(DTR0)
11.6.26 QUERY RESET STATE
11.6.27 QUERY APPLICATION CONTROLLER ALWAYS ACTIVE
11.6.28 QUERY FEATURE TYPE
11.6.29 QUERY NEXT FEATURE TYPE
11.7 Instance control instructions
11.8 Instance configuration instructions
11.8.1 General
11.8.2 ENABLE INSTANCE
11.8.3 DISABLE INSTANCE
11.8.4 SET PRIMARY INSTANCE GROUP (DTR0)
11.8.5 SET INSTANCE GROUP 1 (DTR0)
11.8.6 SET INSTANCE GROUP 2 (DTR0)
11.8.7 SET EVENT SCHEME (DTR0)
11.8.8 SET EVENT PRIORITY (DTR0)
11.8.9 SET EVENT FILTER (DTR2, DTR1, DTR0)
11.9 Instance queries
11.9.1 General
11.9.2 QUERY INSTANCE TYPE
11.9.3 QUERY RESOLUTION
11.9.4 QUERY INSTANCE ERROR
11.9.5 QUERY INSTANCE STATUS
11.9.6 QUERY INSTANCE ENABLED
11.9.7 QUERY PRIMARY INSTANCE GROUP
11.9.8 QUERY INSTANCE GROUP 1
11.9.9 QUERY INSTANCE GROUP 2
11.9.10 QUERY EVENT SCHEME
11.9.11 QUERY INPUT VALUE
11.9.12 QUERY INPUT VALUE LATCH
11.9.13 QUERY EVENT PRIORITY
11.9.14 QUERY FEATURE TYPE
11.9.15 QUERY NEXT FEATURE TYPE
11.9.16 QUERY EVENT FILTER 0-7
11.9.17 QUERY EVENT FILTER 8-15
11.9.18 QUERY EVENT FILTER 16-23
11.10 Special commands
11.10.1 General
11.10.2 TERMINATE
11.10.3 INITIALISE (device)
11.10.4 RANDOMISE
11.10.5 COMPARE
11.10.6 WITHDRAW
11.10.7 SEARCHADDRH (data)
11.10.8 SEARCHADDRM (data)
11.10.9 SEARCHADDRL (data)
11.10.10 PROGRAM SHORT ADDRESS (data)
11.10.11 VERIFY SHORT ADDRESS (data)
11.10.12 QUERY SHORT ADDRESS
11.10.13 WRITE MEMORY LOCATION (DTR1, DTR0, data)
11.10.14 WRITE MEMORY LOCATION NO REPLY (DTR1, DTR0, data)
11.10.15 DTR0 (data)
11.10.16 DTR1 (data)
11.10.17 DTR2 (data)
11.10.18 DIRECT WRITE MEMORY (DTR1, offset, data)
11.10.19 DTR1:DTR0 (data1, data0)
11.10.20 DTR2:DTR1 (data2, data1)
11.10.21 SEND TESTFRAME (data)
12 Test procedures
12.1 General notes on test
12.1.1 General
12.1.2 Test execution
12.1.3 Data transmission
12.1.4 Test setup
12.1.5 Test output
12.1.6 Test notation
12.1.7 Test execution limitations
12.1.8 Test results
12.1.9 Exception handling
12.1.10 Unexpected answer
12.2 Preamble
12.2.1 Test preamble
12.3 Physical operational parameters
12.3.1 Polarity test
12.3.2 Maximum and minimum system voltage
12.3.3 Overvoltage protection test
12.3.4 Current rating test
12.3.5 Transmitter voltages
12.3.6 Transmitter rising and falling edges
12.3.7 Transmitter bit timing
12.3.8 Transmitter frame timing
12.3.9 Receiver start-up behavior
12.3.10 Receiver threshold
12.3.11 Receiver bit timing
12.3.12 Extended receiver bit timing
12.3.13 Receiver forward frame violation
12.3.14 Receiver settling timing
12.3.15 Receiver frame timing FF-FF send twice
12.3.16 Transmitter collision avoidance by priority
12.3.17 Transmitter collision detection for truncated idle phase
12.3.18 Transmitter collision detection for extended active phase
12.4 Device configuration instructions
12.4.1 RESET deviceGroups
12.4.2 RESET quiescentMode
12.4.3 RESET instance groups
12.4.4 RESET event filter
12.4.5 RESET event scheme
12.4.6 RESET: timeout / command in-between
12.4.7 Send twice timeout (device)
12.4.8 Send twice timeout (instance)
12.4.9 Commands in-between (device)
12.4.10 Commands in-between (instance)
12.4.11 SAVE PERSISTENT VARIABLES
12.4.12 SET OPERATING MODE
12.4.13 Device Disable/Enable Application Controller
12.4.14 Multi Master Control Device PING
12.4.15 Quiescent Mode
12.4.16 Device power cycle notification
12.4.17 SET SHORT ADDRESS
12.4.18 Reset/Power-on values (device)
12.4.19 Reset/Power-on values (instance)
12.4.20 DTR0 / DTR1 / DTR2
12.4.21 DTR1:DTR0 and DTR2:DTR1
12.4.22 Device Groups
12.5 Device queries
12.5.1 Device query capabilities
12.5.2 QUERY VERSION NUMBER
12.5.3 Device power cycle seen
12.5.4 Input device error
12.6 Device Memory banks
12.6.1 READ MEMORY LOCATION on Memory Bank 0
12.6.2 READ MEMORY LOCATION on Memory Bank 1
12.6.3 READ MEMORY LOCATION on other Memory Banks
12.6.4 Memory bank writing
12.6.5 ENABLE WRITE MEMORY: writeEnableState
12.6.6 ENABLE WRITE MEMORY: timeout / command in-between
12.6.7 RESET MEMORY BANK: timeout / command in-between
12.6.8 RESET MEMORY BANK
12.7 Device Special commands
12.7.1 INITIALISE timer
12.7.2 TERMINATE
12.7.3 INITIALISE - device addressing
12.7.4 RANDOMISE
12.7.5 COMPARE
12.7.6 WITHDRAW
12.7.7 SEARCHADDRH / SEARCHADDRM / SEARCHADDRL
12.7.8 PROGRAM SHORT ADDRESS
12.7.9 VERIFY SHORT ADDRESS
12.7.10 QUERY SHORT ADDRESS
12.7.11 IDENTIFY DEVICE
12.8 Logical unit cross contamination
12.8.1 DTR0
12.8.2 NVM variables
12.8.3 Random address generation
12.8.4 Addressing 1
12.8.5 Addressing 2
12.8.6 Addressing 3
12.9 Instance addressing
12.9.1 Instance Type Addressing
12.9.2 Instance Primary Group
12.9.3 Instance Group 2
12.9.4 Instance Group 1
12.9.5 Instance Group Combinations
12.9.6 Multiple Instances Answer
12.10 Instance configuration instructions
12.10.1 Instance Enable/Disable
12.10.2 Event Scheme
12.10.3 Input Resolution & Input Value
12.10.4 Event Filter
12.11 Instance queries
12.11.1 Instance Number and Types
12.11.2 Instance Status
12.11.3 Instance Error
12.12 Instance cross contamination
12.12.1 Instance Event Priority
12.13 Reserved Commands
12.13.1 Reserved standard device commands
12.13.2 Reserved instance commands (instance type 0)
12.13.3 Reserved special commands
12.14 General subsequences
12.14.1 Reset Device
12.14.2 EnableApplicationControllerAndAllInstances
12.14.3 DisableApplicationControllerAndAllInstances
12.14.4 HasApplicationController
12.14.5 GetVersionNumber
12.14.6 AddDeviceGroups
12.14.7 RemoveDeviceGroups
12.14.8 ClearAllDeviceGroups
12.14.9 CheckDeviceGroups
12.14.10 GetDeviceGroups
12.14.11 PowerCycle
12.14.12 PowerCycleAndWaitForBusPower
12.14.13 PowerCycleAndWaitForDecoder
12.14.14 SetupTestFrame
12.14.15 GetNumberOfInstances
12.14.16 GetEventFilter
12.14.17 SetEventFilter
12.14.18 GetNumberOfLogicalUnits
12.14.19 GetIndexOfLogicalUnit
12.14.20 GetRandomAddress
12.14.21 GetLimitedRandomAddress
12.14.22 SetSearchAddress
12.14.23 SetShortAddress
12.14.24 ReadMemBankMultibyteLocation
12.14.25 FindImplementedMemoryBank
12.14.26 FindAllImplementedMemoryBanks
12.14.27 ShortAddress
12.14.28 GroupAddress
12.14.29 Broadcast
12.14.30 BroadcastUnaddressed
12.14.31 InstanceNumber
12.14.32 InstanceGroup
12.14.33 InstanceType
12.14.34 InstanceBroadcast
12.14.35 FeatureOfInstanceNumber
12.14.36 FeatureOfInstanceGroup
12.14.37 FeatureOfInstanceType
12.14.38 FeatureOfInstanceBroadcast
12.14.39 FeatureOfDevice
12.14.40 FeatureOfDeviceWithGroupAddress
12.14.41 FeatureOfDeviceWithBroadcast
Bibliography
Figures
Figure 1 - IEC 62386 graphical overview
Figure 2 Current rating test
Tables
Table 1 24bit command frame encoding
Table 2 Instance byte in a command frame
Table 3 24bit event message frame encoding
Table 4 Instance types
Table 5 Feature types
Table 6 Instance group variables
Table 7 Device address information in power cycle event
Table 8 Event addressing schemes
Table 9 Signal level (~50%) versus resolution and input value
Table 10 Example querying sequence to read a 4byte input value
Table 11 Basic memory map of memory banks
Table 12 Memory map of memory bank 0
Table 13 Memory map of memory bank 1
Table 14 Control device capabilities
Table 15 Control device status
Table 16 Instance status
Table 17 Declaration of device variables
Table 18 Declaration of instance variables
Table 19 Instance event messages
Table 20 Device event messages
Table 21 Standard commands
Table 22 Special commands (implemented by both application controller and input device)
Table 23 Device addressing with INITIALISE (device)
Table 24 Unexpected outcome
Table 25 Parameters for test sequence Check Factory Default 103
Table 26 Parameters for test sequence CheckFactoryDefault103PerLogicalUnit
Table 27 Parameters for test sequence Transmitter bit timing
Table 28 Parameters for test sequence Maximum and minimum system voltage
Table 29 Parameters for test sequence Transmitter voltages
Table 30 Parameters for test sequence Transmitter rising and falling edges
Table 31 Parameters for test sequence Transmitter bit timing
Table 32 Parameters for test sequence Receiver frame timing
Table 33 Parameters for test sequence Receiver start-up behavior
Table 34 Parameters for test sequence Receiver bit timing
Table 35 Parameters for test sequence extended receiver bit timing
Table 36 Parameters for test sequence Receiver frame violationand recovering after frame size violation
Table 37 Parameters for test sequence Receiver frame timing
Table 38 Parameters for test sequence transmitter collision avoidance by priority
Table 39 Parameters for test sequence transmittercollision detection for truncated idle phase
Table 40 Parameters for test sequence transmittercollision detection for extended active phase
Table 41 Parameters for test sequence RESET instance groups
Table 42 Parameters for test sequence Send twice timeout (device)
Table 43 Parameters for test sequence Send twice timeout (instance)
Table 44 Parameters for test sequence Commands in-between (device)
Table 45 Parameters for test sequence Commands in-between
Table 46 Parameters for test sequence SET SHORT ADDRESS
Table 47 Parameters for test sequence Reset/Power-on values (device)
Table 48 Parameters for test sequence Reset/Power-on values (instance)
Table 49 Parameters for test sequence DTR0 / DTR1 / DTR2
Table 50 Parameters for test sequence DTR1:DTR0 and DTR2:DTR1
Table 51 Parameters for test sequence READ MEMORY LOCATION on Memory Bank 0
Table 52 Parameters for test sequence READ MEMORY LOCATION on Memory Bank 1
Table 53 Parameters for test sequence Memory bank writing
Table 54 Parameters for test sequence ENABLE WRITE MEMORY: writeEnableState
Table 55 Parameters for test sequence ENABLE WRITE MEMORY: timeout / command in-between
Table 56 Parameters for test sequence RESET MEMORY BANK:timeout / command in-between
Table 57 Parameters for test sequence RESET MEMORY BANK
Table 58 Parameters for test sequence INITIALISE - device addressing
Table 59 Parameters for test sequence COMPARE
Table 60 Parameters for test sequence WITHDRAW
Table 61 Parameters for test sequence PROGRAM SHORT ADDRESS
Table 62 Parameters for test sequence VERIFY SHORT ADDRESS
Table 63 Parameters for test sequence QUERY SHORT ADDRESS
Table 64 Parameters for test sequence IDENTIFY DEVICE
Table 65 Parameters for test sequence Addressing 2
Table 66 Parameters for test sequence Reserved commands:standard device commands
Table 67 Parameters for test sequence Reserved instance commands (instance type 0)
Table 68 Parameters for test sequence Reserved special commands
AS_NZS_62386.103_2020_WEB cover.pdf
AS/NZS 62386.103:2020 Digital addressable lighting interface General requirements - Control devices (IEC 62386-103:2014+AMD1:2018 CSV (ED. 1.1) MOD)
CONTENTS
FOREWORD
INTRODUCTION
1 Scope
2 Normative references
3 Terms and definitions
4 General
4.1 General
4.2 Version number
5 Electrical specification
6 Interface power supply
7 Transmission protocol structure
7.1 General
7.2 24 bit forward frame encoding
7.2.1 Frame format for instructions and queries
7.2.2 Frame format for event messages
8 Timing
9 Method of operation
9.1 General
9.18 Device features
9.2 Application controller
9.2.1 General
9.2.2 Single-master application controller
9.2.3 Multi-master application controller
9.3 Input device
9.4 Instances of input devices
9.4.1 General
9.4.2 Instance number
9.4.3 Instance type
9.4.4 Instance features
9.4.5 Instance groups
9.5 Commands
9.5.1 General
9.5.2 Device commands
9.5.3 Instance commands
9.5.4 Feature commands
9.6 Event messages
9.6.1 Response to event messages
9.6.2 Device power cycle event
9.6.3 Input notification event
9.6.4 Event message filter
9.7 Input signal and input value
9.7.1 General
9.7.2 Input resolution
9.7.3 Getting the input value
9.7.4 Notification of changes
9.8 System failure
9.9 Operating a control device
9.9.1 Enable/disable the application controller
9.9.5 Application controller always active
9.9.2 Enable/disable event messages
9.9.3 Quiescent mode
9.9.4 Modes of operation
9.10 Memory banks
9.10.1 General
9.10.2 Memory map
9.10.3 Selecting a memory bank location
9.10.4 Memory bank reading
9.10.5 Memory bank writing
9.10.6 Memory bank 0
9.10.7 Memory bank 1
9.10.8 Manufacturer specific memory banks
9.10.9 Reserved memory banks
9.11 Reset
9.11.1 Reset operation
9.11.2 Reset memory bank operation
9.12 Power on behaviour
9.12.1 Power on
9.12.2 Power cycle notification
9.13 Priority use
9.13.1 General
9.13.2 Priority of input notifications
9.14 Assigning short addresses
9.14.1 General
9.14.2 Random address allocation
9.14.3 Identification of a device
9.15 Exception handling
9.16 Device capabilities and status information
9.16.1 Device capabilities
9.16.2 Device status
9.16.3 Instance status
9.17 Non-volatile memory
10 Declaration of variables
11 Definition of commands
11.1 General
11.2 Overview sheets
11.3 Event messages
11.3.1 INPUT NOTIFICATION (device/instance, event)
11.3.2 POWER NOTIFICATION (device)
11.4 Device control instructions
11.4.1 General
11.4.2 IDENTIFY DEVICE
11.4.3 RESET POWER CYCLE SEEN
11.5 Device configuration instructions
11.5.1 General
11.5.2 RESET
11.5.3 RESET MEMORY BANK (DTR0)
11.5.4 SET SHORT ADDRESS (DTR0)
11.5.5 ENABLE WRITE MEMORY
11.5.6 ENABLE APPLICATION CONTROLLER
11.5.7 DISABLE APPLICATION CONTROLLER
11.5.8 SET OPERATING MODE (DTR0)
11.5.9 ADD TO DEVICE GROUPS 0-15 (DTR2:DTR1)
11.5.10 ADD TO DEVICE GROUPS 16-31 ( DTR2:DTR1 )
11.5.11 REMOVE FROM DEVICE GROUPS 0-15 (DTR2:DTR1)
11.5.12 REMOVE FROM DEVICE GROUPS 16-31 (DTR2:DTR1)
11.5.13 START QUIESCENT MODE
11.5.14 STOP QUIESCENT MODE
11.5.15 ENABLE POWER CYCLE NOTIFICATION
11.5.16 DISABLE POWER CYCLE NOTIFICATION
11.5.17 SAVE PERSISTENT VARIABLES
11.6 Device queries
11.6.1 General
11.6.2 QUERY DEVICE CAPABILITIES
11.6.3 QUERY DEVICE STATUS
11.6.4 QUERY APPLICATION CONTROLLER ERROR
11.6.5 QUERY INPUT DEVICE ERROR
11.6.6 QUERY MISSING SHORT ADDRESS
11.6.7 QUERY VERSION NUMBER
11.6.8 QUERY CONTENT DTR0
11.6.9 QUERY NUMBER OF INSTANCES
11.6.10 QUERY CONTENT DTR1
11.6.11 QUERY CONTENT DTR2
11.6.12 QUERY RANDOM ADDRESS (H)
11.6.13 QUERY RANDOM ADDRESS (M)
11.6.14 QUERY RANDOM ADDRESS (L)
11.6.15 READ MEMORY LOCATION (DTR1, DTR0)
11.6.16 QUERY APPLICATION CONTROLLER ENABLED
11.6.17 QUERY OPERATING MODE
11.6.18 QUERY MANUFACTURER SPECIFIC MODE
11.6.19 QUERY QUIESCENT MODE
11.6.20 QUERY DEVICE GROUPS 0-7
11.6.21 QUERY DEVICE GROUPS 8-15
11.6.22 QUERY DEVICE GROUPS 16-23
11.6.23 QUERY DEVICE GROUPS 24-31
11.6.24 QUERY POWER CYCLE NOTIFICATION
11.6.25 QUERY EXTENDED VERSION NUMBER(DTR0)
11.6.26 QUERY RESET STATE
11.6.27 QUERY APPLICATION CONTROLLER ALWAYS ACTIVE
11.6.28 QUERY FEATURE TYPE
11.6.29 QUERY NEXT FEATURE TYPE
11.7 Instance control instructions
11.8 Instance configuration instructions
11.8.1 General
11.8.2 ENABLE INSTANCE
11.8.3 DISABLE INSTANCE
11.8.4 SET PRIMARY INSTANCE GROUP (DTR0)
11.8.5 SET INSTANCE GROUP 1 (DTR0)
11.8.6 SET INSTANCE GROUP 2 (DTR0)
11.8.7 SET EVENT SCHEME (DTR0)
11.8.8 SET EVENT PRIORITY (DTR0)
11.8.9 SET EVENT FILTER (DTR2, DTR1, DTR0)
11.9 Instance queries
11.9.1 General
11.9.2 QUERY INSTANCE TYPE
11.9.3 QUERY RESOLUTION
11.9.4 QUERY INSTANCE ERROR
11.9.5 QUERY INSTANCE STATUS
11.9.6 QUERY INSTANCE ENABLED
11.9.7 QUERY PRIMARY INSTANCE GROUP
11.9.8 QUERY INSTANCE GROUP 1
11.9.9 QUERY INSTANCE GROUP 2
11.9.10 QUERY EVENT SCHEME
11.9.11 QUERY INPUT VALUE
11.9.12 QUERY INPUT VALUE LATCH
11.9.13 QUERY EVENT PRIORITY
11.9.14 QUERY FEATURE TYPE
11.9.15 QUERY NEXT FEATURE TYPE
11.9.16 QUERY EVENT FILTER 0-7
11.9.17 QUERY EVENT FILTER 8-15
11.9.18 QUERY EVENT FILTER 16-23
11.10 Special commands
11.10.1 General
11.10.2 TERMINATE
11.10.3 INITIALISE (device)
11.10.4 RANDOMISE
11.10.5 COMPARE
11.10.6 WITHDRAW
11.10.7 SEARCHADDRH (data)
11.10.8 SEARCHADDRM (data)
11.10.9 SEARCHADDRL (data)
11.10.10 PROGRAM SHORT ADDRESS (data)
11.10.11 VERIFY SHORT ADDRESS (data)
11.10.12 QUERY SHORT ADDRESS
11.10.13 WRITE MEMORY LOCATION (DTR1, DTR0, data)
11.10.14 WRITE MEMORY LOCATION NO REPLY (DTR1, DTR0, data)
11.10.15 DTR0 (data)
11.10.16 DTR1 (data)
11.10.17 DTR2 (data)
11.10.18 DIRECT WRITE MEMORY (DTR1, offset, data)
11.10.19 DTR1:DTR0 (data1, data0)
11.10.20 DTR2:DTR1 (data2, data1)
11.10.21 SEND TESTFRAME (data)
12 Test procedures
12.1 General notes on test
12.1.1 General
12.1.2 Test execution
12.1.3 Data transmission
12.1.4 Test setup
12.1.5 Test output
12.1.6 Test notation
12.1.7 Test execution limitations
12.1.8 Test results
12.1.9 Exception handling
12.1.10 Unexpected answer
12.2 Preamble
12.2.1 Test preamble
12.3 Physical operational parameters
12.3.1 Polarity test
12.3.2 Maximum and minimum system voltage
12.3.3 Overvoltage protection test
12.3.4 Current rating test
12.3.5 Transmitter voltages
12.3.6 Transmitter rising and falling edges
12.3.7 Transmitter bit timing
12.3.8 Transmitter frame timing
12.3.9 Receiver start-up behavior
12.3.10 Receiver threshold
12.3.11 Receiver bit timing
12.3.12 Extended receiver bit timing
12.3.13 Receiver forward frame violation
12.3.14 Receiver settling timing
12.3.15 Receiver frame timing FF-FF send twice
12.3.16 Transmitter collision avoidance by priority
12.3.17 Transmitter collision detection for truncated idle phase
12.3.18 Transmitter collision detection for extended active phase
12.4 Device configuration instructions
12.4.1 RESET deviceGroups
12.4.2 RESET quiescentMode
12.4.3 RESET instance groups
12.4.4 RESET event filter
12.4.5 RESET event scheme
12.4.6 RESET: timeout / command in-between
12.4.7 Send twice timeout (device)
12.4.8 Send twice timeout (instance)
12.4.9 Commands in-between (device)
12.4.10 Commands in-between (instance)
12.4.11 SAVE PERSISTENT VARIABLES
12.4.12 SET OPERATING MODE
12.4.13 Device Disable/Enable Application Controller
12.4.14 Multi Master Control Device PING
12.4.15 Quiescent Mode
12.4.16 Device power cycle notification
12.4.17 SET SHORT ADDRESS
12.4.18 Reset/Power-on values (device)
12.4.19 Reset/Power-on values (instance)
12.4.20 DTR0 / DTR1 / DTR2
12.4.21 DTR1:DTR0 and DTR2:DTR1
12.4.22 Device Groups
12.5 Device queries
12.5.1 Device query capabilities
12.5.2 QUERY VERSION NUMBER
12.5.3 Device power cycle seen
12.5.4 Input device error
12.6 Device Memory banks
12.6.1 READ MEMORY LOCATION on Memory Bank 0
12.6.2 READ MEMORY LOCATION on Memory Bank 1
12.6.3 READ MEMORY LOCATION on other Memory Banks
12.6.4 Memory bank writing
12.6.5 ENABLE WRITE MEMORY: writeEnableState
12.6.6 ENABLE WRITE MEMORY: timeout / command in-between
12.6.7 RESET MEMORY BANK: timeout / command in-between
12.6.8 RESET MEMORY BANK
12.7 Device Special commands
12.7.1 INITIALISE timer
12.7.2 TERMINATE
12.7.3 INITIALISE - device addressing
12.7.4 RANDOMISE
12.7.5 COMPARE
12.7.6 WITHDRAW
12.7.7 SEARCHADDRH / SEARCHADDRM / SEARCHADDRL
12.7.8 PROGRAM SHORT ADDRESS
12.7.9 VERIFY SHORT ADDRESS
12.7.10 QUERY SHORT ADDRESS
12.7.11 IDENTIFY DEVICE
12.8 Logical unit cross contamination
12.8.1 DTR0
12.8.2 NVM variables
12.8.3 Random address generation
12.8.4 Addressing 1
12.8.5 Addressing 2
12.8.6 Addressing 3
12.9 Instance addressing
12.9.1 Instance Type Addressing
12.9.2 Instance Primary Group
12.9.3 Instance Group 2
12.9.4 Instance Group 1
12.9.5 Instance Group Combinations
12.9.6 Multiple Instances Answer
12.10 Instance configuration instructions
12.10.1 Instance Enable/Disable
12.10.2 Event Scheme
12.10.3 Input Resolution & Input Value
12.10.4 Event Filter
12.11 Instance queries
12.11.1 Instance Number and Types
12.11.2 Instance Status
12.11.3 Instance Error
12.12 Instance cross contamination
12.12.1 Instance Event Priority
12.13 Reserved Commands
12.13.1 Reserved standard device commands
12.13.2 Reserved instance commands (instance type 0)
12.13.3 Reserved special commands
12.14 General subsequences
12.14.1 Reset Device
12.14.2 EnableApplicationControllerAndAllInstances
12.14.3 DisableApplicationControllerAndAllInstances
12.14.4 HasApplicationController
12.14.5 GetVersionNumber
12.14.6 AddDeviceGroups
12.14.7 RemoveDeviceGroups
12.14.8 ClearAllDeviceGroups
12.14.9 CheckDeviceGroups
12.14.10 GetDeviceGroups
12.14.11 PowerCycle
12.14.12 PowerCycleAndWaitForBusPower
12.14.13 PowerCycleAndWaitForDecoder
12.14.14 SetupTestFrame
12.14.15 GetNumberOfInstances
12.14.16 GetEventFilter
12.14.17 SetEventFilter
12.14.18 GetNumberOfLogicalUnits
12.14.19 GetIndexOfLogicalUnit
12.14.20 GetRandomAddress
12.14.21 GetLimitedRandomAddress
12.14.22 SetSearchAddress
12.14.23 SetShortAddress
12.14.24 ReadMemBankMultibyteLocation
12.14.25 FindImplementedMemoryBank
12.14.26 FindAllImplementedMemoryBanks
12.14.27 ShortAddress
12.14.28 GroupAddress
12.14.29 Broadcast
12.14.30 BroadcastUnaddressed
12.14.31 InstanceNumber
12.14.32 InstanceGroup
12.14.33 InstanceType
12.14.34 InstanceBroadcast
12.14.35 FeatureOfInstanceNumber
12.14.36 FeatureOfInstanceGroup
12.14.37 FeatureOfInstanceType
12.14.38 FeatureOfInstanceBroadcast
12.14.39 FeatureOfDevice
12.14.40 FeatureOfDeviceWithGroupAddress
12.14.41 FeatureOfDeviceWithBroadcast
Bibliography
Figures
Figure 1 - IEC 62386 graphical overview
Figure 2 Current rating test
Tables
Table 1 24bit command frame encoding
Table 2 Instance byte in a command frame
Table 3 24bit event message frame encoding
Table 4 Instance types
Table 5 Feature types
Table 6 Instance group variables
Table 7 Device address information in power cycle event
Table 8 Event addressing schemes
Table 9 Signal level (~50%) versus resolution and input value
Table 10 Example querying sequence to read a 4byte input value
Table 11 Basic memory map of memory banks
Table 12 Memory map of memory bank 0
Table 13 Memory map of memory bank 1
Table 14 Control device capabilities
Table 15 Control device status
Table 16 Instance status
Table 17 Declaration of device variables
Table 18 Declaration of instance variables
Table 19 Instance event messages
Table 20 Device event messages
Table 21 Standard commands
Table 22 Special commands (implemented by both application controller and input device)
Table 23 Device addressing with INITIALISE (device)
Table 24 Unexpected outcome
Table 25 Parameters for test sequence Check Factory Default 103
Table 26 Parameters for test sequence CheckFactoryDefault103PerLogicalUnit
Table 27 Parameters for test sequence Transmitter bit timing
Table 28 Parameters for test sequence Maximum and minimum system voltage
Table 29 Parameters for test sequence Transmitter voltages
Table 30 Parameters for test sequence Transmitter rising and falling edges
Table 31 Parameters for test sequence Transmitter bit timing
Table 32 Parameters for test sequence Receiver frame timing
Table 33 Parameters for test sequence Receiver start-up behavior
Table 34 Parameters for test sequence Receiver bit timing
Table 35 Parameters for test sequence extended receiver bit timing
Table 36 Parameters for test sequence Receiver frame violationand recovering after frame size violation
Table 37 Parameters for test sequence Receiver frame timing
Table 38 Parameters for test sequence transmitter collision avoidance by priority
Table 39 Parameters for test sequence transmittercollision detection for truncated idle phase
Table 40 Parameters for test sequence transmittercollision detection for extended active phase
Table 41 Parameters for test sequence RESET instance groups
Table 42 Parameters for test sequence Send twice timeout (device)
Table 43 Parameters for test sequence Send twice timeout (instance)
Table 44 Parameters for test sequence Commands in-between (device)
Table 45 Parameters for test sequence Commands in-between
Table 46 Parameters for test sequence SET SHORT ADDRESS
Table 47 Parameters for test sequence Reset/Power-on values (device)
Table 48 Parameters for test sequence Reset/Power-on values (instance)
Table 49 Parameters for test sequence DTR0 / DTR1 / DTR2
Table 50 Parameters for test sequence DTR1:DTR0 and DTR2:DTR1
Table 51 Parameters for test sequence READ MEMORY LOCATION on Memory Bank 0
Table 52 Parameters for test sequence READ MEMORY LOCATION on Memory Bank 1
Table 53 Parameters for test sequence Memory bank writing
Table 54 Parameters for test sequence ENABLE WRITE MEMORY: writeEnableState
Table 55 Parameters for test sequence ENABLE WRITE MEMORY: timeout / command in-between
Table 56 Parameters for test sequence RESET MEMORY BANK:timeout / command in-between
Table 57 Parameters for test sequence RESET MEMORY BANK
Table 58 Parameters for test sequence INITIALISE - device addressing
Table 59 Parameters for test sequence COMPARE
Table 60 Parameters for test sequence WITHDRAW
Table 61 Parameters for test sequence PROGRAM SHORT ADDRESS
Table 62 Parameters for test sequence VERIFY SHORT ADDRESS
Table 63 Parameters for test sequence QUERY SHORT ADDRESS
Table 64 Parameters for test sequence IDENTIFY DEVICE
Table 65 Parameters for test sequence Addressing 2
Table 66 Parameters for test sequence Reserved commands:standard device commands
Table 67 Parameters for test sequence Reserved instance commands (instance type 0)
Table 68 Parameters for test sequence Reserved special commands
AS/NZS 62386.103:2020
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